01-27-2020 08:12 AM
Hi, I am new to Zynq architecture and a bit confused about the AXI. As my understanding Bank 0 and Bank 1 contain the 54 MIOs which can be configured and accessed via th PS GPIO registers.
Bank 2 and Bank 3 (AXI) contain the remaining 64 EMIOS. How do I configure and access the Bank 2 and Bank 3 GPIOs.
AXI GPIO has a set of registers which is different from PS GPIO registers. Also the PS GPIO has DATA registers for Bank 2 and Bank 3? What is the purpose of these registers if we have a separate set of registers for AXI GPIOs?
02-20-2020 04:26 AM
Bank 0, Bank 1, Bank 2 and Bank 3 have the GPIO signals coming from PS to peripherals and to PL. AXI GPIO is with the AXI interface and does not comes under the above Banks. So AXI GPIOs has separate registers.