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vivienwwp
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Registered: ‎10-28-2018

AXI SPI module on Spartan-7

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Hi,

  I am intending to have a design of 2 SPI modules. One SPI module 0, the FPGA is the slave and on SPI module 1, the FPGA is the Master. Is this possible?

Do I have to add 2 separate AXI Quad SPI IPs in my design ie. axi_quad_spi_0 and axi_quad_spi1? 

Also, in my code, how do i know whether I am accessing SPI0 or SPI1? Currently in Xilinx SDK xparameters.h, 

#define XPAR_AXI_QUAD_SPI_0_DEVICE_ID 0U

   There doesn't seem to be a SPI1 device. Could someone share some light on this and if what I am trying to achieve is possible ie. FPGA being a slave on one module and master on another SPI module.


Thanks

  

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savula
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Registered: ‎10-30-2017

Hi @vivienwwp ,

  I am intending to have a design of 2 SPI modules. One SPI module 0, the FPGA is the slave and on SPI module 1, the FPGA is the Master. Is this possible?

Yes, It is possible. you need to instantiate 2 axi quad spi IPs in you desing and configure one as master and another as Slave.

once this is done then you will able to see 2 instants of qaud spi in your xparameters.h file. now you can differentiate master and slave based on the mode setting in quad spi IP and device defination in xparameters.h file

 

Best Regards,

Srikanth

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savula
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408 Views
Registered: ‎10-30-2017

Hi @vivienwwp ,

  I am intending to have a design of 2 SPI modules. One SPI module 0, the FPGA is the slave and on SPI module 1, the FPGA is the Master. Is this possible?

Yes, It is possible. you need to instantiate 2 axi quad spi IPs in you desing and configure one as master and another as Slave.

once this is done then you will able to see 2 instants of qaud spi in your xparameters.h file. now you can differentiate master and slave based on the mode setting in quad spi IP and device defination in xparameters.h file

 

Best Regards,

Srikanth

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vivienwwp
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Registered: ‎10-28-2018
Thank you. Yes that works for me now
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