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Visitor
Visitor
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Registered: ‎05-31-2018

AXI Stream verification IP

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Hi there, I want to verify a design via axi4 stream. I am using Vivado 2017.1 Webpack edition but ı could not find the IP in the catalog. I searched in your forum and find the same problem https://forums.xilinx.com/t5/AXI-Infrastructure/how-to-obtain-AXI-Stream-Verification-IP/m-p/830661. I also could not find any information in Vivado release document which is https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_1/ug973-vivado-release-notes-install-license.pdf. It says

Verification IP
° This releases introduces the very first AXI Verification IP
- SystemVerilog based; License-free solution
- Support for AXI3, AXI4, and AXI4-Lite.
- All protocol data widths and address widths, transfer types, and responses
supported
- Full AXI Protocol Checker support
- Integrated ARM Licensed Protocol Assertions
- Pass through mode enables synthesis (synthesizes to wires)
- Configurable simulation messaging
- Example designs and test benches delivered in IP Integrator

 There is no information about AXI4 Stream verification IP in this document. In AXI4 Stream document it is not written supported editions.

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Xilinx Employee
Xilinx Employee
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Registered: ‎10-04-2016

Hi @sya0,

The AXI Stream VIP was in Early Access in 2017.1 and might not have been available across all Vivado editions. Can you upgrade to 2017.2?

Regards,

Deanna

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Xilinx Employee
Xilinx Employee
573 Views
Registered: ‎10-04-2016

Hi @sya0,

The AXI Stream VIP was in Early Access in 2017.1 and might not have been available across all Vivado editions. Can you upgrade to 2017.2?

Regards,

Deanna

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