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Anonymous
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AXI interconnect address map issue

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Hi All,

Am generating an example setup for ZC706. I have given "Auto Assign Address". When I tried to validate the design facing the following critical warning.

"[xilinx.com:ip:axi_crossbar:2.1 3] /axi_interconnect_1/xbarMaster address space segment </axi_pcie_0/M_AXI/SEG_processing_system7_0_GP0_DDR_LOWOCM> overlaps with segment </axi_pcie_0/M_AXI/SEG_processing_system7_0_GP0_QSPI_LINEAR> of cell </axi_pcie_0> and is smaller than master address space </axi_pcie_0/M_AXI> of cell </axi_pcie_0>. AXI Crossbar does not support address range checking of overlapping master address space segments."

What should be done to solve this? Here is screen shots of my design.

 

I have added PCIE EP core and BRAM to design but why there are GPI_QSPI,DDR,IOP address maps??

 

Thanks

Vinod Kumar.

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Scholar
Scholar
7,076 Views
Registered: ‎09-05-2011

This issue is seen only windows 7 only.

I have attached a patch. Please use it 

View solution in original post

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Anonymous
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Screen shots of the design are here

 

 

bd_design.JPG

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Anonymous
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address_map.JPG

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Highlighted
Scholar
Scholar
7,077 Views
Registered: ‎09-05-2011

This issue is seen only windows 7 only.

I have attached a patch. Please use it 

View solution in original post