02-03-2014 05:25 AM
Am generating an example setup for ZC706. I have given "Auto Assign Address". When I tried to validate the design facing the following critical warning.
"[xilinx.com:ip:axi_crossbar:2.1 3] /axi_interconnect_1/xbarMaster address space segment </axi_pcie_0/M_AXI/SEG_processing_system7_0_GP0_DDR_LOWOCM> overlaps with segment </axi_pcie_0/M_AXI/SEG_processing_system7_0_GP0_QSPI_LINEAR> of cell </axi_pcie_0> and is smaller than master address space </axi_pcie_0/M_AXI> of cell </axi_pcie_0>. AXI Crossbar does not support address range checking of overlapping master address space segments."
What should be done to solve this? Here is screen shots of my design.
I have added PCIE EP core and BRAM to design but why there are GPI_QSPI,DDR,IOP address maps??