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Observer
Observer
541 Views
Registered: ‎10-08-2018

AXI slowed down by CSU / PUF?

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I'm currently doing a project on a ZU+ MPSoC (ZCU102) where we send data from PS to PL using AXI Lite.

I noticed something rather strange when I spin up the onboard PUF, namely a drop in AXI performance.
A Xil_Out32 operation which pre-PUF activation took 600 ns now takes 1100 ns.
I haven't found any documentation explaining this behaviour.

To clarify, I'm not using Secure Boot, the PUF is activated via PS and used once.
 
So... what's happening and how can I solve it? Could it be the CSUDMA causing this?

 

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Observer
Observer
480 Views
Registered: ‎10-08-2018

Hi!

Thank you for the troubleshooting tips.
It turns out that the problem was not the PUF registration but rather what happened right before it.

I used parts of the PUF registration example when registering the PUF.
Apparently, the PUF registration example disables the cache via Xil_DCacheDisable prior to PUF registration and does not turn it on again.
Enabling the cache again afterwards using Xil_DCacheEnable removed the performance drop.

Case closed! :-)

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Xilinx Employee
Xilinx Employee
495 Views
Registered: ‎10-04-2016

Hi @niklaslindskog,

There isn't a known issue with enabling the CSU/PUF and AXI performance. Which AXI port are you using to access your PL IP?

My first inclination is that one of the PS clocks has changed frequency. To test this theory, I usually compare the psu_init.tcl from the good system against the slow system. The psu_init.tcl is one of the files that is zipped up in the *.hdf from Vivado.

Regards,

Deanna

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Highlighted
Observer
Observer
481 Views
Registered: ‎10-08-2018

Hi!

Thank you for the troubleshooting tips.
It turns out that the problem was not the PUF registration but rather what happened right before it.

I used parts of the PUF registration example when registering the PUF.
Apparently, the PUF registration example disables the cache via Xil_DCacheDisable prior to PUF registration and does not turn it on again.
Enabling the cache again afterwards using Xil_DCacheEnable removed the performance drop.

Case closed! :-)

View solution in original post