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Contributor
Contributor
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Registered: ‎08-28-2020

AXI4Stream data FIFO not working with DMA

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I tried to transfer (and receive from) data to axi4-stream data fifo through a DMA in which case I connected M_AXIS of FIFO to S_AXIS_S2MM of DMA and S_AXIS of FIFO to M_AXIS_MM2S of DMA.

Following url contains the source code.

https://github.com/vipinkmenon/xilinxDMASystem/blob/master/software/dmaTest.c#L59

But when I do the data transfer to DMA using simple transfer, M_AXIS_MM2S interface halt bit of status register remains at 0 instead of going back to 1. As a result the program can't escape from the relevant while loop...by the way when I check the S_AXIS_S2MM write channel, transferred data can be seen there, and BVALID signal has also been asserted. Is there any specific reason for this issue with DMA? I believe this is not because of the fifo since it works similar to the custom axi stream ip. (For debug purposes I used ILA)


Here I found similar issue in xilinx forums.
https://www.google.com/url?sa=t&source=web&rct=j&url=https://forums.xilinx.com/t5/Processor-System-Design-and-AXI/AXI-DMA-example-not-working/td-p/861788&ved=2ahUKEwjkmY3GhovsAhXTzTgGHRepC-MQFjAAegQIDBAB&usg=AOvVaw1s2LtrJd8HYh4tnmacRkdq
But here the solution was to connect an axis4-interconnect between M_AXIS of fifo and S_AXIS_S2MM of DMA. Is this interconnect necessary?

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Xilinx Employee
Xilinx Employee
192 Views
Registered: ‎10-12-2018

Hi @kavinduvsomadas ,

Seems DMA channel running continuously. Can you please try with below DMA simple polled example?

https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/axidma/examples/xaxidma_example_simple_poll.c

Is it possible to share a screenshot of your design and DMA configuration? 

Thanks & Regards
Anil B
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Xilinx Employee
Xilinx Employee
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Registered: ‎10-12-2018

Hi @kavinduvsomadas ,

Seems DMA channel running continuously. Can you please try with below DMA simple polled example?

https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/axidma/examples/xaxidma_example_simple_poll.c

Is it possible to share a screenshot of your design and DMA configuration? 

Thanks & Regards
Anil B
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Contributor
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Registered: ‎08-28-2020

I'm extremely sorry for being delay to reply you. Yes it worked, and I have few clarifications needs to do. Once I did that, I will post that too here. Thanks for supporing me.