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parithyila
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681 Views
Registered: ‎04-09-2019

Axi interconnect

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Hi

I wrote master Axi code and created and package new ip when i connect with axi interconnect , it is failing in validation ip . it is throwing an ID WIDTH error .

is there any solution

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dpaul24
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Registered: ‎08-07-2014

@parithyila,

hi some time it is validate passing

It must pass validation EVERYTIME, else you have a design problem!

I don't have details of your design, so I can only answer vaguely.

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dpaul24
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Registered: ‎08-07-2014

@parithyila,

I would connect it first to an AXI BFM and verify before connecting it to the axi interconnect of the design.

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parithyila
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Registered: ‎04-09-2019

hi

when i connect AXI slave bfm validation passes

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dpaul24
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@parithyila,

In that case are you sure there were no errors during IP packaging?

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parithyila
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Registered: ‎04-09-2019
Hi it is not showing any error during IP packaging i also observed that when i use two master output from interconnect than it is not throwing validation error
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parithyila
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Registered: ‎04-09-2019
hi some time it is validate passing
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dpaul24
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599 Views
Registered: ‎08-07-2014

@parithyila,

hi some time it is validate passing

It must pass validation EVERYTIME, else you have a design problem!

I don't have details of your design, so I can only answer vaguely.

------------FPGA enthusiast------------
Consider giving "Kudos" if you like my answer. Please mark my post "Accept as solution" if my answer has solved your problem

View solution in original post