06-13-2017 02:28 PM
Hello all,
I am trying to understand the behavior of the Block Memory Generator.
I am trying to write the lower 4 bits using the Zybo board from switches. Such that when I press a button, it would given that address.
For example,
I turn on switches 0001, it should first read 0000.
After I press btn1, it should then be able to read 0001.
Then when I change the switches to 0010, it should read 0000.
When I switch it back to 0001, then it would read 0001.
I tried it, however, the behavior doesn't work, if I were to mess with last 2 bits. The following is the block diagram I have, perhaps I am missing something from the documentation, some guidance may help:
Some guidance and direction pointing would be helpful. I am trying to avoid using AXI-BRAM Controller. However, if that is required, I will use it, but I am trying to avoid it.
06-20-2017 02:16 PM
In order to use BRAM you will need
1) supply full address where the data will be located. It should be within the range shown in the Address Editor tab in the Block design of Vivado, The number of bits in the address should correspond to the range of addresses.
2) supply signal en (enable) '1'
3) supply signal wea "1111" for port A
4) supply a clock signal or a pulse which will trigger writing and reading operation. I never tried this but why not.
You might need to set properties of port A Operating_mode Write_FIRST and port B Read_First.
You can find a lot of help in Vivado. If you right click on the the Block Memory generator you can find relevant documentation.
Also if you are inside the HDL Editor in Vivado and click on the icon looking like a light bulb you will be able to find HDL templates utilizing BRAM. Even if you don't use HDL these templates will help you better understand BRAM.
Let us know if it worked.
06-15-2017 04:53 AM
My feeling is that you need to have some logic that takes all those buttons and brings them into a clocked process, performing appropriate switch debouncing and handling metastability. Connecting the buttons straight to the RAM is likely to cause problems.
Also, could you explain in what way it doesn't work? It'll be pretty hard for anyone to debug it without knowing what is actually happening.
06-20-2017 02:16 PM
In order to use BRAM you will need
1) supply full address where the data will be located. It should be within the range shown in the Address Editor tab in the Block design of Vivado, The number of bits in the address should correspond to the range of addresses.
2) supply signal en (enable) '1'
3) supply signal wea "1111" for port A
4) supply a clock signal or a pulse which will trigger writing and reading operation. I never tried this but why not.
You might need to set properties of port A Operating_mode Write_FIRST and port B Read_First.
You can find a lot of help in Vivado. If you right click on the the Block Memory generator you can find relevant documentation.
Also if you are inside the HDL Editor in Vivado and click on the icon looking like a light bulb you will be able to find HDL templates utilizing BRAM. Even if you don't use HDL these templates will help you better understand BRAM.
Let us know if it worked.
06-21-2017 10:15 AM
Hello it worked. Thanks!