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aravind21.tech
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Registered: ‎12-17-2014

BusyBox operating system on Zedboard

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Hi all,
My boot partition for BusyBox (command line operating system) includes:

zImage, BOOT.bin, devicetree_ramdisk.dtb, ramdisk8M.image.gz

I used the above files provided by digilentinc
and It is working fine..

But when..
I am trying to generate BOOT.bin on my own, it is not working. In my serial terminal output.. there is no zynq> prompt and it is hanging after some point (at SCSI initialization)

 

Please find log files attached

Any suggestions or help ?!

Thanks in advance,
Aravind

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sampatd
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Registered: ‎09-05-2011
The hardware looks good. Perhaps you can try porting petalinux 2014.4 on the board and check if this issue persists.
http://www.xilinx.com/support/documentation/sw_manuals/petalinux2014_4/ug1156-petalinux-tools-workflow-tutorial.pdf

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achutha
Xilinx Employee
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Registered: ‎07-01-2010
Are you using the same design element worked (digilentinc) to create the BOOT.bin or Is is your own design and partition?
If you are using digilentinc file which worked earlier can check the partitions?
If its your custom design i would recommend checking the MIO configuration.

Regards,
Achutha
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sampatd
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Did you enable the TTC timer in the hardware project?

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aravind21.tech
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Hi ,

Thanks for the reply.

--The digilentinc is not providing a project file to generate .bit file for Busybox OS

--It is only providing a project file (system.xmp) for GUI OS

--I am not using it, because it is too complex (carrying HDMI, Audio IPs) also done in ISE XPS which makes new IP addition and migration to vivado difficult.

-So I am creating a simple Zedboard based zynq processing system with only DDR and FIXED_IOs along with UART, USB, enabled.

But still I am not able to create a simple working vivado project that suit for Busybox (command line) operating system.

 

I have attached my project file. Please have a look. Suggest what could be done?

 

Thanks in Advance,

Aravind

 

 

 

 

 

 

 

 

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aravind21.tech
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Hi Sampatd,

Yes, TTC ports can be seen on the block diagram. Did you meant that.

 

Thanks,

Aravind

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aravind21.tech
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project file attachment reg: Sorry for missing attachments.. I cound not attach the entire project directory...

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aravind21.tech
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Any solutions please..?

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sampatd
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Registered: ‎09-05-2011
In Vivado,
File > Archive Project and see if you can attach the project here.
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aravind21.tech
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Registered: ‎12-17-2014

Hi Sampatd,

 Thanks for reply.

I have attached the project file now.

 

Aravind.

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sampatd
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Registered: ‎09-05-2011
The hardware looks good. Perhaps you can try porting petalinux 2014.4 on the board and check if this issue persists.
http://www.xilinx.com/support/documentation/sw_manuals/petalinux2014_4/ug1156-petalinux-tools-workflow-tutorial.pdf

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