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Highlighted
3,418 Views
Registered: ‎08-25-2010

Can I connect together 2 plb bus from 2 FPGA?

HI,

I must use a virtex5 with a PPC and a virtex6 without processor. The PPC (virtex5) must read and write some memory connected to virtex6.

I want know if it is possible to connect 2 plb bus from 2 fpga. With what solution?

 

Best regards

 

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3 Replies
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Teacher
Teacher
3,397 Views
Registered: ‎07-09-2009

Hi

 

Yes is easy answer,

how is the hard answer.

 

How fast do you want to do it ?  How oftern ?

 

Simple , you could put say a rs232 on each plb, and wire across.

    make both rs232 masters on the PLB, and away you go.

 

slow , but reliable.

 

at the other end,

You could put PLB <-> PLB bridges on each chip, and drive across say LVDS,

 

  use DMA and it would be quite fast,

 

 

 

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Highlighted
3,349 Views
Registered: ‎08-25-2010

Thank, for your answer.

But a RS232 link is too slow for update the memory. I need update 2 memorys of 32Mbits.

With your solution, can I utilize a PCIe link for accelerate the transmission?

 

Best reagards.

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Xilinx Employee
Xilinx Employee
3,320 Views
Registered: ‎08-01-2007

you can also try the xps_mch_emc core, which supports the burst like cacheline transfer.

And design a logic in V6 for the SRAM like interface 

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