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alain_k
Observer
Observer
1,881 Views
Registered: ‎06-27-2014

Can't get output pin high

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Hello,

 

I have a MicroZed board with a Zynq 7020 and use Vivado 2014.2 on Windows 7 64bit. Somehow I can't manage to get any ouput pin high. I have a simple and working IP which I can control from the PS, so I think the PL is getting programmed correctly. I added a connection to my design, which connects an output pin directly to VCC. If I open the schematics of the synthesized design, I can also see that VCC has a connection to an OBUF and then to the ouput. Here is a minimal example:

 

Verilog source:

 

module top(
    output wire JX1_LVDS_4_N
);
    assign JX1_LVDS_4_N = 1;
    design_1_wrapper d1(); // Just the zynq in there
endmodule

 

.xdc file:


set_property PACKAGE_PIN T15 [get_ports {JX1_LVDS_4_N}]
set_property IOSTANDARD LVCMOS18 [get_ports {JX1_LVDS_4_N}]

 

Is there anything else I have to do? Is my board broken? I've tried it with many different pins, so this specific pin isn't the problem.

 

Thanks

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alain_k
Observer
Observer
2,400 Views
Registered: ‎06-27-2014

I figured it out. Apparently the MicroZed board expects you to power the I/O's from a carrier card, wich was why my tests failed. I assumed they were powered by the board.

View solution in original post

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alain_k
Observer
Observer
2,401 Views
Registered: ‎06-27-2014

I figured it out. Apparently the MicroZed board expects you to power the I/O's from a carrier card, wich was why my tests failed. I assumed they were powered by the board.

View solution in original post

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