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ejleiss
Participant
Participant
421 Views
Registered: ‎06-03-2019

Change SPI clock Frequency

Hello,

I found the following VHDL code for an SPI master online.  I would like to slow down the SPI clock frequency, but it seems it is tied to my FPGA clock.  How could I modify this code to easily change the SPI clock frequency?
Thank you for the assistance.. The code is attached.

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venui
Moderator
Moderator
206 Views
Registered: ‎04-09-2019

Hi,

May i know which device and IP are you using.

Regards,

Venu

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bhall0107
Adventurer
Adventurer
191 Views
Registered: ‎11-13-2018

Hi @ejleiss

That code definitely takes the system clock in from whatever you connect to it (probably the FPGA clock you're referencing). You could try using a clock divider to lower the frequency and then provide it to this code. Or you could even add the clock divider in this component. I can't make any promises regarding the efficiency of the code in the link I sent, but at least you can see an idea.

Hope that helps,
Brad

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