Showing results for 
Show  only  | Search instead for 
Did you mean: 
Registered: ‎09-22-2014

Combination of traffic_gen and axi_dma for AXI stream

I made a simple test design using the AXI Traffic Generator and the AXI DMA. What I observed is:

- without FIFO between both, the Traffic Generator seems to not send any data (the "Done" bit in the "Streaming Control" register never gets set and the TLSTCNT register stays 0) and the DMA generates a timeout
- using a FIFO between both (see attached BD), the Traffic Generator seems to work, but DMA still generates a timeout

Still what I can observe is that the content in the DMA buffer changes after the transfer attempt.

Any idea why the DMA does not start to transfer data?

Tags (3)
0 Kudos
0 Replies