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Aparna_MK
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Registered: ‎02-12-2021

Creating inout port in custom AXI peripheral

Hi

I am trying to create an inout port in custom AXI lite peripheral. No errors were shown but the block design remains in synthesis step. May I know what can be the reason and what changes are to be made in the AXI program (with respect to the slv_reg values) when we use the ports are inout ports.

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