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Visitor
Visitor
2,789 Views
Registered: ‎01-06-2013

Custom Bus type in MPD file

Hi

 

I am building a multi-core design where I plan to pull out several Read-only signals from the top-level of the PCORE and collect them into another core (something like a Trace Port in Microblaze).

 

I was looking to see if anyone has had luck building a custom bus type in MPD file so that these signals (there are some 15 different names) could be aggregated as a bus ? Or will I have to move them around the MHS level as vectors only ?

 

Regards

Boffin

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Xilinx Employee
Xilinx Employee
2,780 Views
Registered: ‎02-01-2008

You would do something like:

 

BUS_INTERFACE BUS = S_WRQUEUE0 , BUS_STD = WRQUEUE, BUS_TYPE = TARGET

PORT WRDMA0_VALID      = IDVALID , BUS = S_WRQUEUE0, DIR = I          
PORT WRDMA0_READY      = IDREADY , BUS = S_WRQUEUE0, DIR = O    
PORT WRDMA0_ADDR       = ADATA   , BUS = S_WRQUEUE0, DIR = O, VEC = [31:0]

 

An then on the other core that connects to the above, you would have

 

BUS_INTERFACE BUS = M_WRQUEUE0 , BUS_STD = WRQUEUE, BUS_TYPE = INITIATOR

PORT M_WRDMA_VALID      = IDVALID , BUS = M_WRQUEUE0, DIR = O         
PORT M_WRDMA_READY   = IDREADY , BUS = M_WRQUEUE0, DIR = I    
PORT M_WRDMA_ADDR     = ADATA   , BUS = M_WRQUEUE0, DIR = O, VEC = [31:0]

 

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