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markabraira1
Visitor
Visitor
6,957 Views
Registered: ‎09-20-2007

Custom IP Revisions

Is there a doc that spells out the process involved in making changes to a custom IP?

I have successfully created/imported a custom peripheral, but making subsequent changes apparently involves more that merely editing the VHDL source and re-implementing the design.

Thanks,
Mark A.
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centaur19
Xilinx Employee
Xilinx Employee
6,943 Views
Registered: ‎08-01-2007

Mark,

What kind of changes are you talking about?

Now, if your VHDL files have modifications that could impact the wrapper generation (like adding/removing external ports/parameters) or implementation (adding/removing dependencies), then it is recommended you go through the import peripheral wizard. The MPD and the PAO files will be updated.

You could modify these manually as well and the syntax has been documented in the Platform Specification Format Reference Manual (psf_rm.pdf), an online copy of which is available at http://www.xilinx.com/support/documentation/sw_manuals/edk10_psf_rm.pdf

If the modification you make just impacts user_logic.v/vhd, then a re-synthesis and implementation should suffice.




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