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Explorer
Explorer
7,474 Views
Registered: ‎11-16-2012

Do I need to Disable Dcache in lwip?

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Dear all,
I would like to thank you all for ur support.
And I expect same for upcoming problem.

I have few question about lwip,I would be grateful if someone comment on this!
1.is there a way to copy data p_>payload to ddr2 address reliably without DisablingDcache?
In my case I have to call this function if I want to copy my data correctly.and calling this function reduces the speed by 10 times.(from 750 Mb/s to 75 Mb/s)
2.Is lwip really been tested by xilinx with success of data being copied correctly.xapp1026 document speaks some number but I fail to understand if xilinx has really given some tested template for development for user.
3.is there a way to get to know about the next packet packet information. P-> next show 0 always.
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Explorer
Explorer
13,484 Views
Registered: ‎11-16-2012

Dear all,

 

Here is the solution to above mentioned problem.

 

Just flush the cache the cache memory beforing invoking your dma to read the data. 

 

Xil_DCacheFlush();

 

For me it is working fine "till now".

 

With Regards

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Explorer
Explorer
7,331 Views
Registered: ‎11-16-2012
Dear all,
I would like to clarify my question if it is not clear.

I transfer my data using lwip and copy to specific memory location (I still have speed of 750 Mb/s) . I can read the copied data which looks absolutely correct. But I can't read it through my PL . My PL read data from same memory location is not correct. When I disable the cache everything is fine but then I loose my speed by factor of 10. Please suggest me some way out to this. This seems to be standard problem and I believe xilinx will have solution to this. Please help me here.! I would be grateful for your help.
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Highlighted
Explorer
Explorer
13,485 Views
Registered: ‎11-16-2012

Dear all,

 

Here is the solution to above mentioned problem.

 

Just flush the cache the cache memory beforing invoking your dma to read the data. 

 

Xil_DCacheFlush();

 

For me it is working fine "till now".

 

With Regards

View solution in original post

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Explorer
Explorer
7,231 Views
Registered: ‎08-21-2013

It's not clear why you are trying to deal with the cache on your own. Are you having some sort of issue?

 

Altough I have not looked at it recently, the lwip driver used to handle cache issues. For example, in the 2014.2 version, there is a file:

 

C:\Xilinx\SDK\2014.2\data\embeddedsw\ThirdParty\sw_services\lwip140_v2_1\src\contrib\ports\xilinx\netif\xemacpsif_dma.c

 

In emacps_recv_handler(), on line 341 you will find:

 

            Xil_DCacheInvalidateRange((unsigned int)p->payload, (unsigned)XEMACPS_MAX_FRAME_SIZE);

 

and on line 192 in emacps_sgsend you will see:

 

        Xil_DCacheFlushRange((unsigned int)q->payload, (unsigned)q->len);

 

You are only solving half the problem and not very efficiently since you flush the entire D-cache.

 

I believe the Xilinx driver is also unncessaryily invalidating the entire XEMACPS_MAX_FRAME_SIZE instead p->len. Xil_DCacheInvalidateRange and Xil_DCacheFlushRange had bugs that may or may not have been fixed (I'm guessing not).

 

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Newbie
Newbie
2,866 Views
Registered: ‎07-04-2017

Dear vidyut,

 

First of all, I would like to thank your for sharing your solution. 

 

I have exactly your situation. My application use UDP instead of TCP. In PS side; UDP callback function received payload, and store it in memory DDR3. I used memcpy() function to do that. In PL side; VDMA used to read payload from DDR3.

 

There are multiple questions, and I hope you can answer:

 

- In UDP callback function, after receive payload, and store it in DDR3, I will use Xil_DCacheFlush(). Is that right ?

 

- Did you find better solution than  ?

 

- Have try to change gcc optimization level into (-o2) as recommended in (xapp1026.pdf). If yes then did you see any changes in performance ?

 

Best Regards,

tsharif

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