I am designing this new board with the standard LPDDR4 JEDEC footprint for a dual rank part on a MPSoC. This means 4 CS’s. Micron has a single rank part with the same footprint but only 2 of the CS’s are used. I see how to setup the memory controller in Vivado to support this but I don’t know how to make that setup dynamic. Meaning we could put either a Micron or Samsung part in the board and have it work. Do you have any insight?