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rickehrle
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Registered: ‎04-15-2015

ECC enabled BRAM causes data abort when reading uncorrectable error

Hi,

 

I am running a bare metal application on Zynq connected to a BRAM on the PL. ECC is activated and the goal is to test the BRAM with ECC. I first inject errors and then read the ECC Status register as follows

 

 

// Enable ECC.
Xil_Out32(XPAR_AXI_BRAM_CTRL_0_BASEADDR + XBRAM_ECC_ON_OFF_OFFSET, 1);

// Memory address.
memory_Addr = XPAR_BRAM_0_BASEADDR + BRAM_OFFSET + memory_Count * 4;
// Set flip bit and write to memory. Xil_Out32(XPAR_AXI_BRAM_CTRL_0_BASEADDR + XBRAM_FI_D_0_OFFSET, 0x00000001); Xil_Out32(memory_Addr, rand()); // Clear status register for ignoring write bit flip. Xil_Out32(XPAR_AXI_BRAM_CTRL_0_BASEADDR + XBRAM_ECC_STATUS_OFFSET, 3); // Read and check status register for errors.
Xil_In32(memory_Addr); Status1 = Xil_In32(XPAR_AXI_BRAM_CTRL_0_BASEADDR + XBRAM_ECC_STATUS_OFFSET) & BRAM_CE_MASK; Status2 = Xil_In32(XPAR_AXI_BRAM_CTRL_0_BASEADDR + XBRAM_ECC_STATUS_OFFSET) & BRAM_UE_MASK;

The code above gives 1 for Status1 and 0 for Status2. However, when XBRAM_FI_D_0 is changed so that two bits or more are flipped, e.g. 0x00000003,  the line Xil_In32(memory_Addr) goes to "B DataAbortHandler" in the asm_vectors.S file and I need to reset the board.

 

Has anyone experienced that as well? Is any extra setting needed? (I suppose not, since it works fine for one bit flip.)

 

Thanks in advance for any help or suggestions,

Ricardo.

 

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rickehrle
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Registered: ‎04-15-2015

I tried with a Microblaze and it worked normally.
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rickehrle
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Registered: ‎04-15-2015

I also tried using only one port on the BRAM to change the scenario a little bit. Still nothing. :(
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