cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Observer
Observer
278 Views
Registered: ‎12-19-2018

ERROR: Failed to sync 2496848/-1 bytes

Hi,

I am getting a sync error in system design, when moving data from one ddr to other ddr. What is causing this problem ?

Datatype is half.

Host code

binaryFile = xcl::find_binary_file(device_name, "cnn_GOOD");
cl::Program::Binaries bins = xcl::import_binary_file(binaryFile);
devices.resize(1);
cl::Program program(context, devices, bins);
cl::Kernel krnl_cnn_conv(program,"cnn");

//std::cout << "Starting " << (good ? "GOOD" : "BAD") << " Kernel" << std::endl;

 

size_t image_size_bytes = sizeof(datatype_inh) * 512 * 224 * 224;
size_t weight_size_bytes = sizeof(datatype_inh) * 1248424;
size_t output_size_bytes = sizeof(datatype_inh) *512 * 224 * 224;
//size_t para_size_bytes = sizeof(datatype_inh) *512 * 224 * 224;
size_t para_size_bytes = sizeof(datatype_inh) * 1248424;
// Allocate Buffer in Global Memory
std::vector<cl::Memory> inBufVec;
std::vector<cl::Memory> wgtBufVec;
std::vector<cl::Memory> outBufVec;
std::vector<cl::Memory> paraBufVec;

cl_mem_ext_ptr_t inExt, wgtExt,outExt,paraExt; // Declaring two extensions for both buffers
inExt.flags = XCL_MEM_DDR_BANK0; // Specify Bank0 Memory for input memory
wgtExt.flags = XCL_MEM_DDR_BANK1; // Specify Bank1 Memory for output Memory
outExt.flags = XCL_MEM_DDR_BANK2; // Specify Bank1 Memory for output Memory
paraExt.flags = XCL_MEM_DDR_BANK3; // Specify Bank1 Memory for output Memory
//paraExt.flags = XCL_MEM_DDR_BANK1; // Specify Bank1 Memory for output Memory

// Setting input and output objects
inExt.obj = image.data();
wgtExt.obj = weight.data();
outExt.obj = output.data();
paraExt.obj = chan_buff.data();

// Setting param to zero
inExt.param = 0 ; outExt.param = 0; // Setting param to zero
wgtExt.param = 0 ; paraExt.param = 0;


cl::Buffer buffer_image (context, CL_MEM_USE_HOST_PTR | CL_MEM_READ_WRITE | CL_MEM_EXT_PTR_XILINX ,
image_size_bytes, &inExt);
cl::Buffer buffer_weight(context, CL_MEM_USE_HOST_PTR | CL_MEM_READ_ONLY | CL_MEM_EXT_PTR_XILINX ,
weight_size_bytes, &wgtExt);
cl::Buffer buffer_output(context, CL_MEM_USE_HOST_PTR | CL_MEM_READ_WRITE | CL_MEM_EXT_PTR_XILINX ,
output_size_bytes, &outExt);
cl::Buffer buffer_para(context, CL_MEM_USE_HOST_PTR | CL_MEM_READ_WRITE | CL_MEM_EXT_PTR_XILINX ,
para_size_bytes, &paraExt);

inBufVec.push_back(buffer_image);
wgtBufVec.push_back(buffer_weight);
outBufVec.push_back(buffer_output);
paraBufVec.push_back(buffer_para);

int narg = 0;
krnl_cnn_conv.setArg(narg++, buffer_image);
krnl_cnn_conv.setArg(narg++, buffer_weight);
krnl_cnn_conv.setArg(narg++, buffer_output);
krnl_cnn_conv.setArg(narg++, buffer_para);
uint64_t duration = 0;


q.enqueueMigrateMemObjects(inBufVec,0/* 0 means from host*/);
q.enqueueMigrateMemObjects(wgtBufVec,0/* 0 means from host*/);
//q.enqueueMigrateMemObjects(paraBufVec,0/* 0 means from host*/);
//q.enqueueMigrateMemObjects({buffer_weight,buffer_para},0);///* 0 means from host*/);
//OCL_CHECK(err, err = q.enqueueMigrateMemObjects({buffer_output, buffer_para},0/* 0 means from host*/));

cl::Event event;

auto kernel_start = std::chrono::high_resolution_clock::now();
q.enqueueTask(krnl_cnn_conv, NULL, &event);
printf("start0");
q.finish();
printf("start0");
auto kernel_end = std::chrono::high_resolution_clock::now();
auto kernel_time = std::chrono::duration<uint64_t, std::nano>(kernel_end - kernel_start);
duration = kernel_time.count();

//Copy Result from Device Global Memory to Host Local Memory
//q.enqueueMigrateMemObjects(outBufVec,CL_MIGRATE_MEM_OBJECT_HOST);
q.enqueueMigrateMemObjects(paraBufVec,CL_MIGRATE_MEM_OBJECT_HOST);
q.finish();
printf("start0");
std::cout << "Finished kernel" << std::endl;

 

Kernel code:

datatype_inh *output_5, // Read-Only Image
datatype_inh *weights, // Read-Only Weight Matrix
datatype_inh *output_6, // Output Filters/Images
datatype_inh *para
)
{
#pragma HLS INTERFACE m_axi port=output_5 offset=slave bundle=gmem0
#pragma HLS INTERFACE m_axi port=weights offset=slave bundle=gmem1
#pragma HLS INTERFACE m_axi port=output_6 offset=slave bundle=gmem2
#pragma HLS INTERFACE m_axi port=para offset=slave bundle=gmem3

#pragma HLS INTERFACE s_axilite port=output_5 bundle=control
#pragma HLS INTERFACE s_axilite port=weights bundle=control
#pragma HLS INTERFACE s_axilite port=output_6 bundle=control
#pragma HLS INTERFACE s_axilite port=para bundle=control
#pragma HLS INTERFACE s_axilite port=return bundle=control

 

for(int i = 0 ; i < 1248424 ; i++)
{
para[i]=weights[i];
}

 

0 Kudos