12-14-2018 12:12 AM
I created a Vivado Project with just Zync PS and used the hardware platform to run the EmacPS Intr DMA example in SDK. The code fails at detecting phy address and returns "Error detect phy". I am using Vivado 2017.4.
I went through a lot of forum discussions about the same issue and many of the discussions deal with PetaLinux project. Mine is just a baremetal application. I also tried connecting ENET0 reset to pin 50, but it didn't help. Can someone please help me find where the issue is?
12-14-2018 04:20 AM
What board are you using? If using a development board, are you using the presets for this board in the Vivado IPI?
If this is a custom board, then can you verify if the PHY is out of reset, and relevent connections between the Zynq SoC and
PHY are correct?
12-21-2018 02:53 AM
The phy detect error was because the MDIO and MDC pins in the Zync block design were connected to EMIO, instead of MIO pins. Once I changed the connection, phy detection worked fine.
Now, other problem has popped up. The example application has PHY configuration for Marvell and TI chips and not Realtek chip. I managed to change the register settings for Realtek chip but in the Realtek phy datasheet the basic mode control register seems to have speed setting only for 10Mbps and 100Mbps and not 1Gbps. I couldn't find any other register setting to enable 1Gbps.
And, the code waits infinitely for receive complete interrupt to be called and it never seems to happen. As per the code, the PHY is set in loopback mode and not emacps. Should emacps also be set in loopback?
Can someone really help in this? This application is part of the peripheral test and it fails all the time. How do we go about working with Zync Ethernet when the test code itself fails miserably?
09-03-2019 12:05 AM
Sorry to bother you
Did your second problem be solved? I have the same problem. The code waits infinitely for receive complete interrupt to be called and it never seems to happen.
Can you help me?
Thank you so much.