02-21-2016 09:24 PM
Hi, I am trying to bring up a proprietary High Speed IP on Xilinx V7 FPGA using the GT. I was planning to use the "Eye Scan with MicroBlaze Processor MCS" (XAPP743), for tuning the GT parameters. For this, I would sweep the DFE and CDR parameters and measure the corresponding eye for each value.
However, in the docs it says that only the equalizer settings (DFE/ LPM) can be tested. Can you please let me know if CDR can be swept as well thru this, and if so how can it be done.
02-23-2016 12:08 PM
Moved to appropriate board