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samuelcotard
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Registered: ‎06-12-2015

FSBL without DDR

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Hello,

 

I have a dedicated board that does not integrate any external memory. The application is small enough to fit in the OCM memory.

 

The default FSBL is designed to work with DDR. I found 2 ways to modify the FSBL for my specific need :

1/ https://www.xilinx.com/support/answers/56044.html
2/ http://www.wiki.xilinx.com/Zynq-7000+AP+SoC+Boot+-+Booting+and+Running+Without+External+Memory+Tech+Tip

Both solutions are documented for old versions of Vivado.

 

The solution 1/ is not suitable for me as the application memory footprint is limited to 64K.

 

I tried to implement the 2nd solution without success by merging differences between sources files provided in tech tip and the default FSBL provided by Vivado 2016.4 . There are now a lot of differences due to the updates to Vivado 2016.4 and I guess I miss something.

 

Has anybody a newer version of this kind of implementation (FSBL in XIP_MODE and application in OCM) ?

Is there another way to make the FSBL working without DDR?

 

Thanks in advance

 

Regards

 

Samuel

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samuelcotard
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Registered: ‎06-12-2015

Thanks Rick for your help, it works fine.

 

In details,

1/ at the begining of main.c, I commented out the DDR init section.

2/ in qspi.c, I modified InitQspi()  to force access in linear mode as you explained.

3/ at the end of main.c, I replace FsblHandoff(HandoffAddress) by the post_config piece of code followed by the call to my application appliMain()

I join my 2 modified files (vivado 2016.4)

 

The footprint of the bootloader with optimisation -Os is 70kB. You only get 120kB free in memory for your application.

 

Regards,

View solution in original post

13 Replies
drjohnsmith
Teacher
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Registered: ‎07-09-2009

Sorry I dont know

 

But I'm very interested if you get an answer on how to not use external memory, 

 

( the fact its ddr is not relevant as such ) 

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rikraf
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Registered: ‎01-15-2008

Yes, you can do this, though it's not obvious.  I got it working on a custom board with QSPI and no external RAM.  Note that you cannot do it with NAND flash (my first cut at the PCB design used this, and I discovered it wasn't possible to boot from NAND without external RAM, due to the need for complicated bad-block tables.  I had to respin the board).

 

Here are the notes I made on the topic.  Hope this helps.

 

Rick

 

The boot ROM

The QSPI flash holds both the bitstream for programming the Programmable Logic (PL) portion of the Zynq and the executable software that runs on the Zynq processor.  This is a complicated issue.

A typical Zynq system with a lot of DDR RAM will include a First Stage Boot Loader (FSBL) executable, and also a much larger application program, which might be an entire Linux operating system, for instance.  In our no-DDR case, the executable must fit in the 192kB On Chip Memory (OCM), so I’ve combined the boot-loader with the application into a single executable (“FSBL_plus_app”).

I created the bootloader in SDK- they supply an FSBL model.  But this model assumes the presence of DDR RAM and so needs a lot of editing to work right in our system.

 

When the Zynq processor powers on, or is given a hard reset (via the PS_PORb input), it first executes the on-chip Boot Rom (which is unalterable).  This code reads the boot mode jumpers, does a little bit of Processor System (PS) setup, then loads the executable from the flash device into the OCM and vectors to it.  In a system with DDR, the FSBL would then initialize DDR, load a much larger application from flash into DDR, load the configuration bitstream into the PL, and then vector to the application in DDR.  In our system, the Boot Rom reads the jumpers, sets up the PS, then loads the executable (FSBL_plus_app) into OCM, programs the PL and vectors to OCM.  The processor continues to execute the service loop from OCM.

 

The 32MB (256Mb) QSPI can be addressed two different modes,  “linear” or “IO”.  In linear mode some hardware is used to read the contents with less processor intervention; in IO mode the processor has to get more involved.  But only the lower half of the 32MB is accessible in linear mode due to the 24-bit addressing limitation.

 

The FSBL generated in SDK sets the mode to IO, because the QSPI is >16MB.  But the FSBL then wants to move the PL partition into DDR prior to transferring it, via DMA, to the PL.  Since there’s no DDR, this won’t work (one could perhaps rework the FSBL PartitionMove to transfer data in smaller chunks, but that seems like a can of worms).  In linear mode, the partition goes directly via DMA to the PL, no DDR required.  To get around this I hard-coded the access mode to “Linear” (in qspi.c):

 

if (1){//QspiFlashSize <= FLASH_SIZE_16MB) {  RJR Added

 

Now the transfer will be done in linear mode, despite the flash being 32MB.

This works fine with the zedboard (XC7Z020), whose bitstream is about 4MB.  But our system has an XC7Z100, whose bitstream is 16.7MB.  This won’t fit in half the flash, unless it’s compressed (and the flash needs to contain the executable, too).  Therefore, the XC7Z100 bitstream needs to be compressed.  My hw_platform_06 design compressed from 16.7MB to 2.5MB.  Compression is not guaranteed to save any space at all (it simply sets a flag whenever a configuration frame is exactly equal to the previous one).  If our ultimate hardware design is extremely full we might get into trouble here, in which case we’d have to rework the FSBLcode to access the full 32MB space without the use of DDR. (An alternative which would also save some power would be to use an XC7Z050on the flight board, if the design would fit).

drjohnsmith
Teacher
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Registered: ‎07-09-2009

Fantastic reply

 

thank you

 

Xilinx , if your listening, how about paying this person to write up an app note for you.

 

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samuelcotard
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Registered: ‎06-12-2015

Thanks a lot for sharing and for the quality of your notes.

 

I will try to include my software into the FSBL code and will post the result.

 

Regards,

 

Samuel

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samuelcotard
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Registered: ‎06-12-2015

Thanks Rick for your help, it works fine.

 

In details,

1/ at the begining of main.c, I commented out the DDR init section.

2/ in qspi.c, I modified InitQspi()  to force access in linear mode as you explained.

3/ at the end of main.c, I replace FsblHandoff(HandoffAddress) by the post_config piece of code followed by the call to my application appliMain()

I join my 2 modified files (vivado 2016.4)

 

The footprint of the bootloader with optimisation -Os is 70kB. You only get 120kB free in memory for your application.

 

Regards,

View solution in original post

dbircsak
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Registered: ‎06-13-2016

I haven't had a chance to really read through this post. I just wanted to mention I came here because I'm using SDK 2017.1 with No DDR and am trying to get the "Zynq FSBL" example project to work. Right now I cannot create an image and flash correctly.

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loongyu
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Registered: ‎04-25-2018

   I have built a project according to http://www.wiki.xilinx.com/zynq-7000+ap+soc+boot+-+booting+and+running+without+external+memory+tech+tip.

   But if I run the application,error occurs. What is the reason?

image003(04-26-07-53-49).png
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drjohnsmith
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Registered: ‎07-09-2009

try starting a new thread, and more people will see it.

 

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7,181 Views
Registered: ‎07-15-2018

Hi,

 

I’m trying to FSBL without DDR right now, so I used scripts offered in your reply. Now I met an issue. I’d like to add UART into appliMain() to print strings uploaded to my PC, but I failed. Whether do I need any other setup in vivado 2016.4 and SDK, such as enable DDR option? Actually I’m not sure where is the problem. Could you please help to check the attached script regarding to main.c() and find the problem if possible?

 

Thank you very much in advance.

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6,319 Views
Registered: ‎07-15-2018

Thanks Rick's scripts, i modified some places according to his program,it works fine.

 

The key is to run your own program before LoadBootImage.I hope this helps others.

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liuchaoth
Newbie
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Registered: ‎10-19-2018

I want to say something.

For I am trying to config PL without DDR, I did following experiments.

1,just modify ps7_init() function, remove DDR by comment blow

// DDR init
//ret = ps7_config (ps7_ddr_init_data);
//if (ret != PS7_INIT_SUCCESS) return ret;

2,comment DDR test in main.c of fsbl project

/*
* DDR Read/write test
*/
//Status = DDRInitCheck();

3,remove all operations related to DDR, like Partition Checksum or signed Checksum in image_mover.c

The list above make sense in theory, however I am stucked at PL copying(issue of move bit directly from FLASH to FPGA, replace the flow of moving from FLASH to DDR, then DDR to FPGA)

 

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liuchaoth
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Registered: ‎10-19-2018
After two days experience, I found that the PL configuration need a DMA trasfer which has a special flag.
Do this mean we cannot config the PL with CPU?
I think the DMA support copying from OCM, but DOES it support SCATTER OR HANDSHAKE OR other method.
I just don't want to use the DDR.
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apateljfti
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Registered: ‎06-28-2019

@ samuelcotard
How did you optimize bootloader footprint to 70kB. The best I was able to optimize the bootloader size to 284 kB from default 493kB. This was achieved by removing some unnecessary code and changes the settings for Debugging level to None on ARM v7 gcc complier (see attached picture). I also set the Optimization to -Os on C application project and the bsp associated with the project. I am still not able to get the bootloader .elf size to reduce to like 70 kB. Can you please help me with this FSBL to run on ZYNQ without DDR memory? I working a custom board with Zynq 7007s and no DDR memory.  At this time, I don't have anything application to run PS. I need to initialize the PS since I'm using the PS-PL clock on the FPGA. I am also using PS for flash memory to boot from QSPI and UART0 for debugging purpose. I don't intent to use anything else on PS, so it is very simple application. So, I didn't add DDR memory on my board.

I want to boot Zynq and program PL directly from the Flash. I followed everything all your steps here except I am not sure how to optimize my FSBL elf file to reduce the file size. When I flash the BOOT file I generated from this program with FSBL 284 kB elf, I am successful with flash operation but when I reboot it doesn't boot from the flash. So, it really doesn't complete the flash process as I would expect. 

The last thing that gets printed on terminal for fsbl messages is:

fsbl_printf(DEBUG_INFO,"No Execution Address JTAG handoff \r\n");

This is right before the appliMain() function call in main.c file. Which I currently am not doing anything with (see attached txt file with message printed for FSBL debug info).

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Debugging-Setting.PNG
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