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Registered: ‎02-10-2019

FreeRTOS, AMP, XScuGic_InterruptMaptoCpu() with CPU_ID=1

Hello,

(A) This is the initial C++ Application Project using CPU0:
> Vivado 2019.1
> Zybo Z7-20
> FreeRTOS, lwIP, and xilffs
> Includes 1KHz PL-PS interrupt
This project works fine

(B) I then created a second C++ Application Project that uses CPU1:
> Add -DUSE_AMP=1 to BSP extra_compiler_flags
This project works fine

(C) In an effort to start unloading CPU0, I attempted to service the PL-PS interrupt using CPU1.  Here is the configuration for that interrupt that runs on FreeRTOS/CPU0:
=====
void enable_pl_ps_interrupt()
{
// FreeRTOS has setup the controller, only add the needed interrupt
XScuGic_Connect(&xInterruptController,XPAR_FABRIC_ZYBO_TIIDL_PL_0_KHZ_TICK_INTR,
(Xil_ExceptionHandler)TickInterrupt,
(void *)&xInterruptController);
XScuGic_SetPriorityTriggerType(&xInterruptController,XPAR_FABRIC_ZYBO_TIIDL_PL_0_KHZ_TICK_INTR,0,3);

//// Call the is being made, with CPU_ID = 0 or 1
////XScuGic_InterruptMaptoCpu(&InterruptController, CPU_ID, INTERRUPT_ID); // CPU_ID 0 or 1

//// this call works when CPU_ID=0, FreeRTOS
XScuGic_InterruptMaptoCpu(&xInterruptController,0,XPAR_FABRIC_ZYBO_TIIDL_PL_0_KHZ_TICK_INTR);

//// this call does not work when CPU_ID=1, AMP
//XScuGic_InterruptMaptoCpu(&xInterruptController,1,XPAR_FABRIC_ZYBO_TIIDL_PL_0_KHZ_TICK_INTR);

// Enable the interrupt for the device
XScuGic_Enable(&xInterruptController, XPAR_FABRIC_ZYBO_TIIDL_PL_0_KHZ_TICK_INTR);
}
=====

I think this call can redirect the interrupt to CPU_ID 0 or 1:
> XScuGic_InterruptMaptoCpu(&InterruptController, CPU_ID, INTERRUPT_ID);

The interrupt works fine if CPU_ID=0, but not with CPU_ID=1

I found two posts with updates for earlier versions of Vivado for XScuGic_InterruptMaptoCpu().  I tried both of those updates, with the same results.

The code as as shown uses the ISR in the CPU0 project when CPU_ID=1, and that may be problematic?  I then tried substituting the absolute address of an ISR in the CPU1 project.  Same results.

I found many other posts, mostly AMP-AMP and Linux-AMP, but nothing that addressed FreeRTOS-AMP.

QUESTION:

How and where should the interrupt resources be configured such that an ISR in CPU1 is called?

Thanks,
Dave

Follow-up, created new project with the same FreeRTOS, lwIP, and AMP setup, but without xilffs and application code.  Same results, interrupt works on CPU0, apparently never called on CPU1.

 

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Registered: ‎02-10-2019

Apparently this is impossible, or maybe this was wrong forum?

PPI offer limited options, but do work.  SGI works when triggered from RTOS to AMP; haven't tested SGI trigger from inside RTOS ISR.

 

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