03-13-2020 09:17 AM
Morning Xilinx community,
I've been a developper for 10 years and I'm getting started with FPGA on a new project: 40+ SPI slave in parallel for large sensor acquisition. In order to achieve that I will start simple and try to read one sensor's UID using only logic, no soft/hard processor. My hardware is a Spartan7 dev board.
I found the examples for QuadSPI & Axi Traffic Generator and I have the following questions:
I'm new to Vivado and FPGA world I'm trying to focus in specific bits, step by step, to avoid building a big mess I don't control.
Thanks in advance for any tip or help !
03-16-2020 05:24 PM
Which Spartan-7 Eval board are you using? SP701?
Can you describe what kind of sensors you're trying to communicate with. How do they connect to the board?
03-17-2020 01:11 AM
Yes it's the SP701. Sensor wise we use what we produce in-house, gyros and accelerometers.
Before even trying to plug one sensor I would love to establish an efficient development process that allows me to quickly simulate transactions without having to re-build/compile everything everytime I change a register in the traffic generator, this is the main blocking point so far.
Thanks in advance for any tip
03-17-2020 02:07 AM