03-15-2021 11:03 PM
I'm trying to use the XILINX IP CORE AXI_DMA_v7.1 on VIVADO 2019.2.
I would like to know more precisely about the Scatter / Gather DMA programming mode and how different it is from the Direct Register Mode DMA?
Please guide me with some example design in order to understand the difference between the two modes.
Thanks & Regards,
03-17-2021 12:37 AM
Please refer to the answer record which explains with example designs how to use AXI DMA core in a system.
You can also refer to the below wiki page for different axi dma bare-metal examples.
03-17-2021 01:35 AM
Totally different. Register DMA is "simple", SG is, let's say, more elaborate. You need to set up the block descriptors, that tell the DMA where to fetch data from/ to. SG can be, as simple DMA, polled or interrupt controlled, and can be one-shot or cyclic. There is one example of each in the Vitis installation. In my case I was struggling with it and at the end I found it didn't work with APU cores in 64-bit mode so I used the RPU. There is also the AXI DMA user guide, that in my opinion doesn't "guide" much... the examples are clearer.