I am migrating a design from the ZYNQ 7010 to the ZYNQ UltraScale+.
The original design's processing_system7_0 block has an input showing in the Block Deisng Editor called USB1_VBUS_PWRFAULT.
1) How do I toggle whether this port shows in the ZYNQ 7010 design? (I don't see where it's enabled in the Re-customization screen.)
2) Is there a functionally equivalent status bit in the UltraScale+? If not, how does the UltraScale+ monitor the health of its USB functions?