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huybui90
Visitor
Visitor
2,233 Views
Registered: ‎06-12-2017

How to integrate IP with built-in master DMA controller into MicroBlaze system?

Hello guys,

 

I have an IP with built-in master DMA controller which transfer data between system memory (DLMB) and internal IP buffer through AXI4 interface. UBlaze is connecting to local memory via LMB. How to integrate this IP into MicroBlaze system to do DMA operation?

 

Thanks

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kravi
Xilinx Employee
Xilinx Employee
2,176 Views
Registered: ‎02-26-2014

Hi,

 

If the DMA IP has AXI master interface, you need to have AXI interface with system memory. But you have mentioned that it has LMB interface.

You can consider migrating system memory to AXI, including MUBlaze.

 

Regards,

Ravi

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huybui90
Visitor
Visitor
2,170 Views
Registered: ‎06-12-2017

Thanks kravi. That's correct. bram and axi_bram_ctrl should be used as system memory. uBlaze and my IP will read/write memory through axi4 interface. But I'm wondering how uBlaze grant DMA access for my IP? It does not have DMA req/ack pins.
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kravi
Xilinx Employee
Xilinx Employee
2,162 Views
Registered: ‎02-26-2014

Hi,

 

There may be some registers in DMA IP, to configure and initiate the transfers.

Generally IP vendors provide driver for the IP, try using it.

 

Regards,

Ravi

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huybui90
Visitor
Visitor
2,158 Views
Registered: ‎06-12-2017

Thanks kravi. I got the idea now. AXI interconnect will take care of arbitration between uBlaze and DMA IP right? DMA IP is my design so I can easily control it.
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