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Observer
Observer
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Registered: ‎08-31-2012

IO bank conflicts in Vivado with auto pin assignment to PS peripherals

 

Normally when creating a PS/PL system with default LED pins in Vivado, there is no constraints file in the project. Synthesis goes wel. After adding pins on normal I/Os for my hardware, the IO STANDARD is LVCMOS25 in my custom .xdc file, the systhesis does his job correctly.

 

Now I want to work with 3V3 on VADJ. LVCMOS33 standard is applied to all I/O pins. Here the .xdc file has been updated. However there are "hidden" pin assignments for PS peripherals like LEDs, UART in the Vivado because its ".xdc" file is not visible in the project. When forcing the synthesis, I got the error messages that a certain bank has conflict: 2V5 and 3V3.

 

How can I overrule the hidden/PS pin assignments that they should work with 3.3 V?

 

 

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