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Explorer
Explorer
10,535 Views
Registered: ‎11-21-2014

Interface BRAM to AXI 4 stream

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Hi,

how could we interface memory mapped block memory generator to AXI4 stream? Any IPs in IP catalog or other ways.

Please help.

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Teacher
Teacher
16,822 Views
Registered: ‎03-31-2012

you need to add a "axi bram controller" between the bram & the data mover.

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Scholar
Scholar
10,485 Views
Registered: ‎11-09-2013

convert stream to mm and then use axi bram

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Explorer
Explorer
10,481 Views
Registered: ‎11-21-2014

@trenz-al. Thanks for your answer. But how could we convert stream to memory mapped. Are there any IPs?

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Scholar
Scholar
10,472 Views
Registered: ‎11-09-2013

yes

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Xilinx Employee
Xilinx Employee
10,462 Views
Registered: ‎08-02-2011
Do you want an AXI4 Master or slave? If you just want a slave, the job is done for you. It's called the AXI Streaming FIFO. See PG080.

If you want a master, you'll use an AXI DMA, AXI Datamover, or maybe AXI VDMA.
www.xilinx.com
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Explorer
Explorer
10,418 Views
Registered: ‎11-21-2014

@bwiec. Hi, I have Block memory generator, and either AXI stream FIFO or  AXI DMA / AXI Datamover in my block design. I cannot connect the interfaces? Please help

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Teacher
Teacher
10,416 Views
Registered: ‎03-31-2012
instantiate a datamover, select s2mm option only. now you have a s2mm port which should connect to a stream and the mm2s should connect to block ram interface. What happens when you try this? Post a capture of your block diagram
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Explorer
Explorer
10,401 Views
Registered: ‎11-21-2014

@muzaffer. Hi, thanks for your answer. I tried as you suggested. Still it does not work.

 

The screenshot is :

Untit0led.png

 

Please help.

 

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Teacher
Teacher
16,823 Views
Registered: ‎03-31-2012

you need to add a "axi bram controller" between the bram & the data mover.

- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.

View solution in original post