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eduardoparra
Participant
Participant
5,994 Views
Registered: ‎06-28-2016

Interrupts handling Custom Device Driver Axi Interrupt Controller

Hi,

I'm currently working on a Embedded Linux project using Petalinux Tools and a MPSoC UltraScale+ on a ZCU102 Evaluation Board. Im trying to use the AXI interrupt controller because i have more than 16 interrupts. I have created a Custom IP which generate 10 interrupts, which i connect to the input of an AXI INTC via Concat. When i watch the Interrupt Status Register of the AXI INTC, the interrupts are being catched correctly. I'm trying to write a Device Driver for the Custom IP in order to handle each interrupt. Until now i have only be able to handle the first (of the 10) interrupt (first bit of the ISR). Is there any example of a device driver with more than one interrupt?? Have i to do something special in the driver as the device is connected to the axi INT instead of the GIC??. I have attached my driver to know what i am missing. Thank you in advance!!

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6 Replies
5,922 Views
Registered: ‎06-10-2015

Hi, 

 

Is there any reason for the single IP to produce 10 separate interrupts? Are  you expecting to handle multiple interrupts at the same time (i.e. different interrupts have different priorities)? A different approach to this is for your IP to only generate a single interrupt, OR'd with the 10 different interrupt signals and then have your driver read a register from the IP to classifiy which interrupt you need to process (i.e. which ISR function that needs to be executed). 

 

I am aware this is not a direct solution, but food for thought.

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debrajr
Moderator
Moderator
5,866 Views
Registered: ‎04-17-2011

There is a known issue with Interrupt handing when AXI INTC is connected to GIC. As a suggestion, update the testcase to configure AXI Interrupt Controller IP such that its “Interrupt Output Connection” is “Single” and then connect the “irq” pin to PS block’s ps_pl_irq0 input pin.
Regards,
Debraj
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pvenugo
Moderator
Moderator
5,858 Views
Registered: ‎07-31-2012

Hi,

 

Make sure that your custom IP's 10 interrupt signal have correct intr IDs. Interrupt need to be priortize i.e. only one intr need to be registered and serviced at a time.

The AXI INTC to GIC issue should be fixed in next release of tool.

 

Regards

Praveen


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vanmierlo
Mentor
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3,185 Views
Registered: ‎06-10-2008

I have 10 AXI UART Lite and tried to connect them through an AXI Interrupt Controller (INTC) with single IRQ output to the IRQ_F2P of a Zynq. I'm using Vivado 2017.4 and Petalinux 2017.4. The generated devicetree looks fine with the UART Lite having the INTC as parent and the INTC having the GIC as parent. But it still does not work. Is there any special setting I have to make in the INTC?

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mslwdqq
Observer
Observer
710 Views
Registered: ‎03-28-2019

Did you make INTC successfully work with GIC?
I'm searching on a solution for it.
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mslwdqq
Observer
Observer
705 Views
Registered: ‎03-28-2019

Hi dear sir,
when 2 interrupts simultaneously signaled , GIC always dealing the highest priority interruput but lower priority interrupt always in pending state.
For example, A and B are queued in pending register and A has higher priority. GIC will always handle A, but B never handled just in pending state.

Did you find some solutions to deal with this problem?

What i need is just want to make sure GIC will alternating handle A and B.

Thanks for your help!
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