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Observer
Observer
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Registered: ‎06-25-2016

MIO Programming for MPSoC's CAN Controller

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The following description is given in Chapter 20 "CAN contorller" of UG1085.

Programming Example – Assign MIO Pin to CAN RX Input
This example assigns MIO pin 46 to the CAN RX controller signal. These steps refer to the
IOU_SLCR register set.
1. Route the reference clock. Write 32h'0000_1221 to the MIO_PIN_46 register.

However, according to MPSoC register reference, MIO_PIN_46 (IOU_SLCR) Register has bits 31: 8 and bit 0 as Reserved.

Why write 32h'0000_1221 to the MIO_PIN_46 register?

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Xilinx Employee
Xilinx Employee
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Registered: ‎04-09-2019

Re: MIO Programming for MPSoC's CAN Controller

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Hi,

That might be typo write 32h'0000_1220 is sufficient since the Bit 0 is reserved.

Regards,

Venu 

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Xilinx Employee
Xilinx Employee
251 Views
Registered: ‎04-09-2019

Re: MIO Programming for MPSoC's CAN Controller

Jump to solution

Hi,

That might be typo write 32h'0000_1220 is sufficient since the Bit 0 is reserved.

Regards,

Venu 

View solution in original post

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