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amahpour
Observer
Observer
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Registered: ‎01-28-2015

MPSoC Verification IP Memory Space

Hi,

Where is the AXI memory space defined in the simulation when I call read_data and write_data transaction as described in Zynq UltraScale+ MPSoC Verification IP v1.0? I want to view all the data as a memory block in simulation (versus calling read_data one address as a time).

Thanks,

Ari

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