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Visitor
Visitor
3,278 Views
Registered: ‎03-03-2009

MRCC or SRCC

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I am trying to implement some custom VHDL in an AXI4 Master IP created in Vivado which will go to a Dual FIFO before being passed to the PS. This will be clocked at around 156MHz from an external clock at around 78MHz. The PS side of the FIFO will be at 100MHz.

 

My question is should I bring this in a MRCC or SRCC (showing my limited FPGA knowledge here)?  Is the IP that I'm clocking with the external clock too large for an SRCC or conversely is a MRCC too global to accommodate the external clock while the 100MHz clock is contolling half of the FIFO?

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Voyager
Voyager
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Registered: ‎06-24-2013

@jlnoack

 

Thank you both for your replies.

You're welcome!

 

it seems I can use either the MRCC or SRCC inputs for my external clock to clock my peripheral and FIFO.

Yup, it probably doesn't matter for this case.

 

I assume Vivado will choose the type of BUF that would be used if I choose the MRCC for example.

Yes, depending on your design.

 

All the best,

Herbert

-------------- Yes, I do this for fun!

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Voyager
Voyager
3,266 Views
Registered: ‎06-24-2013

Hey @jlnoack,

 

My question is should I bring this in a MRCC or SRCC (showing my limited FPGA knowledge here)?

Doesn't really matter, any clock capable pin/pair will work for this purpose.

 

Is the IP that I'm clocking with the external clock too large for an SRCC?

A dual clock FIFO in the ZYNQ will basically consist of a dual port BRAM and a few LUT and registers to handle the FIFO logic. So only a few resources which will easily fit into one clock region.

 

 is an MRCC too global to accommodate the external clock?

The multi region clock capable inputs are more scarce in the FPGA, so you don't want to waste them lightly when you might need them for other clock inputs, but otherwise there is not much difference to the single region clock inputs in your case.

 

Hope this clarifies,

Herbert

-------------- Yes, I do this for fun!
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Guide
Guide
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Registered: ‎01-23-2009

The clock capable pins in a 7 series FPGA serve two purposes; access to the local clocking resources and access to the global clocking resources.

 

If you are using the global clocking resources (BUFG, BUFH, MMCM, PLL) then the MRCC and SRCC have exactly the same capability - there is no difference between the two.

 

If you are using the local clocking resources (BUFR and BUFIO), then then the SRCC and MRCC can both only drive only the BUFIO and BUFR located in the same clock region. The BUFIO can then only drive the IOB flip-flops and high speed clock of the ISERDES in the same I/O bank and the BUFR can clock all the logic (except the high speed clock of the ISERDES) in the same clock region.

 

The only difference between the SRCC and MRCC is that the MRCC can also drive the BUFMR. The BUFMR can then drive the BUFIO/BUFR in the same clock region as well as in the clock regions above and below the MRCC. This would generally be used for "ChipSync" (source synchronous) interfaces that need to use more pins than are available in one I/O bank.

 

That being said, if you don't need the extra functionality of the BUFMR, then it is probably best to use the SRCC pins first.

 

Avrum

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Visitor
Visitor
3,217 Views
Registered: ‎03-03-2009

Thank you both for your replies.  I will have 4 inputs that I will be measuring frequencies with the Custom AXI4 Full Peripheral and an output from the peripheral to feedback to the external clock to control its frequency. The Custom AXI4 Full Peripheral and associated code for the frequency counters (Counters, Accumulators etc) along with half of the FIFO will be synchronous with the external clock. The other half of the FIFO will be synchronous with the PS clock.  So there isn't a lot of I/O.

 

Having read you're replies it seems I can use either the MRCC or SRCC inputs for my external clock to clock my peripheral and FIFO. I assume Vivado will choose the type of BUF that would be used if I choose the MRCC for example.

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Voyager
Voyager
4,362 Views
Registered: ‎06-24-2013

@jlnoack

 

Thank you both for your replies.

You're welcome!

 

it seems I can use either the MRCC or SRCC inputs for my external clock to clock my peripheral and FIFO.

Yup, it probably doesn't matter for this case.

 

I assume Vivado will choose the type of BUF that would be used if I choose the MRCC for example.

Yes, depending on your design.

 

All the best,

Herbert

-------------- Yes, I do this for fun!

View solution in original post