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Registered: ‎09-25-2017

Methodology For Interrupt-Driven IP Design

I've been looking at several component blocks to use with a Microblaze such as I2C and UART, and I see a lot of similarities in the overall design. 

Is there a way that describes the methodology for the interaction between hardware and software in a cohesive way at this level from the design perspective?

I'm an FPGA person but I'd like for the software team to have an easier time utilizing my blocks, and rather than just "setting a register when it is done" and forcing them to poll, or utilizing an external interrupt generator and a simple bit flag, I think that if I planned a head it might make my gateware designs more flexible. 

Is there a good document/book/etc that would give me more insight into this from a design perspective so that I can "speak" to software easier (or even just make it easier for myself to hook up to a microblaze)?


Thanks all!

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