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Registered: ‎07-07-2017

Microblaze xil_out32 execution time


I have a microblaze system that work on bram via lmb(so I have no cache) and AXI QSPI IP with 256 words fifo is connected through axi interconnect. However, if I try to write data to spi continuously takes to much time. For example, for the alternative 1

SPI module transmits a data once in every 53 clock cycles. I observed that with the ILA at the output of SPI. Then I unrolled the for loop and latency was decreased to 47 clock cycles (alternative 2). Then I omitted variable and latency was decreased to 43 clock cycle (alternative 3). According to simulations axi bus write latency is about 8 clock cycle. Isn't 35 clock cycles too much  for just executing xil_out32 ?




Alternative 1: 53 clock cycles

for(int i = 0; i<byteCount; i++){
Xil_Out32(AXI_SPI_DTR_ADDR, tx_buf[i]);


Alternative 2: 47 clock cycles
int i = 0;
Xil_Out32(AXI_SPI_DTR_ADDR, tx_buf[i]);
Xil_Out32(AXI_SPI_DTR_ADDR, tx_buf[i+1]);
Xil_Out32(AXI_SPI_DTR_ADDR, tx_buf[i+2]);


Alternative 3: 43 clock cycles
Xil_Out32(AXI_SPI_DTR_ADDR, tx_buf[0]);
Xil_Out32(AXI_SPI_DTR_ADDR, tx_buf[1]);
Xil_Out32(AXI_SPI_DTR_ADDR, tx_buf[2]);



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Registered: ‎03-22-2016

Xil_out32 is just a volatile set #define Xil_Out32(Addr, Value) (*(volatile u32 *)((Addr)) = (Value)) Are you compiling in Release mode? You could possibly compile in Debug and turn optimization on. Then you can turn on the disassembly and see what's going on instruction-wise. Or you can do an objdump on your ELF from the command line. --- We do this for fun. Always give kudos. Accept as solution if your question was answered.
I will not answer to personal messages - use the forums instead.
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