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Contributor
Contributor
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Registered: ‎11-29-2019

Microblaze

Hi,

I am trying to create an IP for apb slave and connect it to the microblaze.

I had followed these steps,correct me if i am wrong,

1. I wrote an apbslave verilog code and created an IP .

2. After this in the package ip window opens, in the ports and interfaces tab->add interface->interface-definition->advanced->apb_rtl.and i mapped the ports.

3.In the address and memory i added this apb interface and cretaed a address block.

4. I packaged the IP.

5. in the block design layout, added the microblaze, axi interconnect,axi apb bridge and i connected the packaged IP to the axi apb bridge.

Up to this is it correct?

here the problem arrises,

when i click on generate output products, and create HDL wrapper,  then in the package IP window in the Files group Tab it shows a "merge changes from the file wizard group" after i clicked this it is showing an error like "ipx::merge_project_changes failed due to earlier reasons". In the messages tab it is showing 3- errors like,

[IP_Flow 19-907] File Group 'xilinx_anylanguagesynthesis (Synthesis)': Component circularly references subcore "xilinx.com:user:apb_slave:1.0".
[IP_Flow 19-907] File Group 'xilinx_anylanguagebehavioralsimulation (Simulation)': Component circularly references subcore "xilinx.com:user:apb_slave:1.0".
[IP_Flow 19-907] File Group 'xilinx_implementation (Implementation)': Component circularly references subcore "xilinx.com:user:apb_slave:1.0".

why these errors are coming up ?

Thanks in advance,

Regards,

Jahnavi.

 

 

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