I have a design using a Zynq Ultrascale+. Minor modifictions in the Processing System pinout (GEM#2 moved to GEM#0, PCIE reset moved, etc) have been made to the design.
I would like to be able to support both variants of hardware in the most efficient way. I am specially trying to avoid having two BlockDesigns, where the PS is instantiated in, as controlling those in svn/git is a nightmare.
Since the PS pinout is basically controlled by SW (upon startup routines in psu_init.c configure the system), if I was able to generate those products for both of my hardware variant that would be solved.
I would like to modify my BD and export the HDF (and others) to SDK repeteadly (without implementing the design each time). I have tried this repeatedly however it does not seem to be working. Does anybody know if SDK needs a bitstream for some reason in order to generate those output products correctly?