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Registered: ‎09-09-2019

PL Clock settings in ZC702


I work with the zc702 and would like to understand if it is possible to change the clock frequency arbitrarily by setting the value somewhere. I saw that by opening the IP of the PS there is a section (Clock Configuration >> PL Fabric Clocks) in which it would seem possible to modify the clock of the PL section by arbitrarily setting it to a value between 50MHz and 250MHz. If it were possible I would like to understand how to do it and what is the minimum resolution that can be obtained.
trying to compile I can get the synthesis and implementation but I get the following error during the generation of the bitstream:
[BD 41-951] Parameter LAYERED_METADATA not found on / processing_system7_0 / FCLK_CLK0
Any information on the possibility of generating an arbitrary value clock in a certain range would be appreciated.


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