PicoBlaze6 , Vivado, Simulation problem

[dag1]

I am running into a problem with Picoblaze6. It is a hard problem since it happens with the TEST operation, but only in some circumstances.

I am using the default mode which is like PicoBlaze3, namely, 1K memory, 64 byte scratchpad, and C_FAMILY = "7S"

I enclose:

1.  main.VHD which shows a simple system that is based on the Picoblaze6.

2. 3 pictures showing timing diagram, with the problem appearing in RED section on the address bus. The problem starts when the signal sx (in the PicoBlaze) takes "0X" value. Which causes the Zero_flag to take the value  'X' (RED color).

3. the Assembly code (SW2LED.LOG file), the problem occurs on TEST operation in address 350

350  0CF10     loop: TEST sF[inputREG], s1[mask]

Explanation: as can be seen when executing the TEST operation (op code instruction 0CF10) the Z flag gets an 'X' value.

Then when executing the JUMP Z operation at memory location 351

 351  32353           JUMP Z, 353[BIT0]

the picoblaze address gets bad value consisting of a vector of  "X" and then execution returns to location 0 which has the instruction code 20100

000  20100    start: CALL 100[init]

instead of jumping to location 353 or continuing to 352.

I tried some other examples with TEST but in other programs where I use TEST I don't see this problem.

It is possible to dig into the KCPSM6 and follow why the Z flag is set to 'X'. So far I managed to trace it back up to a signal called sx in the PicoBlaze6 which

get its lowest four bits value at 'X' exactly when the zero_flag_value gets 'X'. This signal sx is used by the ALU which in turn influences the zero_flag_value which feeds the D of the Z f.f. (see the  picture enclosed)

This problem appears in many different assembly codes that we tried. Not just in the code that I enclose here.

I guess either I am missing something as far as setting the KCPSM6 parameters, or missing something about the Vivado which is necessary for using the PicoBlaze6.

I use the pBlazeIDE to simulate the code (on a virtual Picblaze3) and it runs well.

I do manage to generate bitstream and then program the bit file to the FPGA and the system operates well on the FPGA

Any advise of the cause of this problem with the Vivado simulation?

[dag1]

I forgot to attach the main.VHD which connects the picoblaze

Here it is.

[dag1]

And the assmbly code listing

[dag1 · Accepted solution]

I want to thank Cathal McCabe from Xilinx for figuring out the problem.

It turns out that the external register from  PicoBlaze6 reads from was not initialized and so the first active read_strobe  reads invalid values to the PicoBlaze6 and this causes its strange behavior. One obvious solution is to add CLR input to the register and connect it to the external RST.

[cmccabe]

Thanks for posting the solution for the community!