06-28-2017 10:34 PM
06-28-2017 11:58 PM
06-29-2017 02:12 AM
In addition the text shown on page 4 of 'KC705_KCPSM6_SPI_Flash_reference_design.pdf' you should take a look at page 9 where you will see that I have shown the subroutine of PSM code that implements the SPI communication that generates the SPI clock signal. I have presented the waveforms showing how the code executes a loop of 14 instructions and therefore generates an SPI clock pulse once every 28 system clock cycles.
Please remember that this is a 'reference design' with documentation and comprehensive comments in the source code to be as educational as possible. You are free to use the reference designs as they provided but generally they are a starting point and reference to implement exactly what you need. In the case of SPI communication it may be desirable to increase the communication rate by adding a small hardware peripheral to perform the serialisation of bytes and it would be your implementation of that parallel/serial converter that would then define the SPI clock rate.