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zguo
Adventurer
Adventurer
2,609 Views
Registered: ‎05-19-2017

Processor System Reset not letting me change external reset polarity?

I have a design that has multiple reset signals for various reasons, and to generate the appropriate secondary resets I'm using a couple of processor system resets in the block design. I've had to delete and re-add them a couple of times, but for some reason now all of the new reset blocks I add in no longer allow me to change the ext reset logic level, they are fixed to auto. Why would this be? This is in Vivado 2017.1.

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5 Replies
pvenugo
Moderator
Moderator
2,546 Views
Registered: ‎07-31-2012

Hi,

 

Please share the block design you are using in 2017.1.

Could you clean the block design and recreate them? That may help.

 

Or, make ext_reset_in pin external and then change the polarity of external reset port to active high. After saving your design, tool would automatically change the polarity of ext_reset_in pin to active high.

 

Regards

Praveen


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zguo
Adventurer
Adventurer
2,497 Views
Registered: ‎05-19-2017

Can't share the design. At this point it's starting to look like every processor reset that I instantiate I can't change the polarity, whereas the processor resets that get instantiated when I do any sort of design automation in the block design, I can go and modify. Seeing as I need to get the design working, I just flipped the polarity of my reset signal and left it at that.
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legendbb
Voyager
Voyager
1,566 Views
Registered: ‎07-28-2008

Just to add here, I ran into the similar issue. 2017.1, although Processor System Reset (5.0) GUI seems allow setting "Ext Reset Logic Level", but after change it to "1", click [OK] close reopen, it stuck at "0". And my hardware test shows, it's "0".

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stephenm
Xilinx Employee
Xilinx Employee
1,551 Views
Registered: ‎09-12-2007

The input reset signals polarity are propagated from the ports driving them.

Is this the case here?
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bulentcandan
Observer
Observer
1,230 Views
Registered: ‎08-31-2015

Hello,

 

I have the same issue and the driving port is defined as RST port. I have set the dirving port level to logic 1 but the Ext Reset In polarity stuck at logic level 0. I can update the AUX Reset in with same method bu not Ext Reset In.

 

Thank you

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