Due to the aleatory access that I need in my design I need to use a memory QDR2, but this memory is not supported by the MPMC.
In the QDR2 I have to write an Image(video@30Hz resolution Megapixel).
In my system there will be also a Microblaze, some others MPMC.
How can I integrate the QDR2 to my system, is there a controller for QDR2 sram? Can I use this controller with the EDK?
What do you suggest me?
There is emc core in EDK supports SRAM, but it is not QDR2.
QDR2 controller can be generated in MIG tool.
So, there are two aspects you need consider
1. Is there any video data path between MB and QDR2, if not ,you don't need to add it is on PLB bus, then just use the MIG generated QDR2 controller.
2. If MB will read the video data and do some process, then while use QDR2? I'm thinking the bottleneck will be on BUS and MB, so use general SRAM is enough (use emc core)