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Visitor
Visitor
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Registered: ‎09-22-2018

Question about lockstep R5 RPU on Zynq Ultrascale+ MPSoC

Hello,

With the lockstep mode of operation for the R5 RPUs, if there is a discrepancy between the two processors, what happens? Can we alert the user with an interrupt or something? Also, is there a way to inject a fault to cause a discrepany between the two RPUs? Any info would be appreicated.

 

Thank you.

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Xilinx Employee
Xilinx Employee
606 Views
Registered: ‎09-01-2014

Re: Question about lockstep R5 RPU on Zynq Ultrascale+ MPSoC

An interrupt will be generated. Since it’s an ARM processor feature, you need to check ARM documents.
And since it’s a part of functional safety, Xilinx provides a test program to perform error injection on the RPU lockstep comparators. you can get it from the functional safety lounge.
https://www.xilinx.com/member/safety.html#zynqusplus
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