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sulcas.mindaugas
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Registered: ‎05-17-2018

RPU DMA managment while petalinux runs on APU

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Hello everyone, 

I wanted to ask if it is possible in ZynqMPSoC architecture to manage DMA transfers from PL to DDR by RPU running baremetal while APU runs petalinux?

Thank you

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demarco
Xilinx Employee
Xilinx Employee
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Registered: ‎10-04-2016

Hi @sulcas.mindaugas ,

UG1186 goes into this. In simple terms, you have to partition off an area called "reserved memory" so that Petalinux doesn't use it for operating system functions. I think you also have to configure the R5 MPU so that the shared region of DDR memory is un-cached.

The Xilinx OpenAMP Forum under Embedded Systems is also a good resource as you work through these issues.

Regards,

Deanna

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demarco
Xilinx Employee
Xilinx Employee
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Registered: ‎10-04-2016

Hi @sulcas.mindaugas ,

Yes, this is possible. Most of the complexity is in sorting out the resource sharing and configuring Petalinux/R5 software correctly. I'm assuming that the A53 does not need to also use the DMA.

Here are a few documents about OpenAMP and LibMetal. These are the software pieces to make resource sharing possible. They aren't specific to your application, but provide an overview.

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_1/ug1186-zynq-openamp-gsg.pdf

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841718/OpenAMP

Regards,

Deanna

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sulcas.mindaugas
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Registered: ‎05-17-2018

Thank you @demarco for your answer. There is something that I still want to ask. If RPU is used to manage dma transfers to DDR will this DDR region will be accessible by APU and will it be cached? If yes is there something I must do to achieve it or it will be like this by default? Thank you very much

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demarco
Xilinx Employee
Xilinx Employee
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Registered: ‎10-04-2016

Hi @sulcas.mindaugas ,

UG1186 goes into this. In simple terms, you have to partition off an area called "reserved memory" so that Petalinux doesn't use it for operating system functions. I think you also have to configure the R5 MPU so that the shared region of DDR memory is un-cached.

The Xilinx OpenAMP Forum under Embedded Systems is also a good resource as you work through these issues.

Regards,

Deanna

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sulcas.mindaugas
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Registered: ‎05-17-2018

Thank you!

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Registered: ‎01-10-2020

Hi,

I am working with Petalinux 2019.2 and vitis. And I am trying to run linux on APU and baremtal application on the RPU. I am using openamp for the APU-RPU communication and it's running perfectly. The next step now is to try to receive some data from PL through a DMA block (managed by the RPU baremetal application) and to send it to the APU via OpenAMP. 
I added reserved memory node on the device tree of my petalinux project in order to reserve two regions:

from 0x00_8000_0000 to 0x00_8000_FFFF (for DMA-Control Register)

from 0x0100_0000 to 0x014F_FFFF (for DMA BD_Space and TX/RX-Buffers)

 

(Device tree is in the attatchments.)

But my baremetal application failed to execute the XAxiDma_reset() function. So I am not able to initialize the AXI DMA engine. 

Do we need other additional configurations in order to make the RPU core able to initialize the DMA engine ?

thanks in advance

BR

Iheb

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Jack222
Observer
Observer
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Registered: ‎09-01-2020

Hi @demarco ,

I have a similar problem:Why PS DMA(run by RPU) does not work successfully, while RPU running with APU?

I just posted a post describing the details and having a log. Do you have any suggestions?

The address of the post: https://forums.xilinx.com/t5/Processor-System-Design-and-AXI/Why-PS-DMA-run-by-RPU-does-not-work-successfully-while-RPU/td-p/1146496

 

With best regards,

Jack

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