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jbito4
Visitor
Visitor
242 Views
Registered: ‎04-01-2021

Read/Write data from FIFO Generator (AXI-Stream) from/in custom IP which has AXI4 interface

Hi,

I am new to Vivado and IP Integrator, so the question might be pretty basic. 

I am developing Radar detection function using ZC702 evaluation board. I have created a custom IP block to process some data from ADC and return some detected values after the data processing.

The data from ADC is coming from FIFO generator block through AXI-Stream interface, which cannot be directly interfaced with AXI4 in my custom block. What I want to do is to stream data in the custom IP without using PS and store the detected data in memory so that PS can access. As I read the posts on this forum, it seems that AXI DMA or Data Mover IP can convert AXI-Stream to AXI4 so that I can read/write from/in the IP block with AXI4 interface.

Solved: Re: convert AXI Stream to AXI memory mapped - Community Forums (xilinx.com)

axi4-full to fifo interface - Community Forums (xilinx.com)

In the IP core repository, I found a header file that has data register (0x0, 0x100, etc.) for each input/output port I defined in the IP block. However, I am having hard time understanding how exactly I should specify the address where the data should be written/read using DMA or Data Mover IP even after reading the aswer in the previous posts.

I read PG021 and PG022 manuals, but where I supposed to use the data register information in the IP block is not very clear. Is there any manual/website that explains how?

Thank you very much for your help in advance.

 

1 Reply
abouassi
Moderator
Moderator
131 Views
Registered: ‎03-25-2019

Hi @jbito4,

These are the register address offsets.
The base address of your IP depends from how you configure it on your project. The address configuration should be found under the "Address Editor" tab:

abouassi_0-1619105851888.png

For example, in the above design, the AXI DMA was mapped to 0xA000_0000

Best regards,
Abdallah
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