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1,287 Views
Registered: ‎05-16-2013

SDIO EMIO for MPSoC

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I am attempting to use SDIO via EMIO to communicate with a device.  Can someone explain the *_cmdena signals?  I know they involve using it as a input to an IOBUF, but I cannot find documentatation on it.  Do I simply hook up to the T input of an IOBUF or does it need to be inverted?

image.png

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1,142 Views
Registered: ‎05-16-2013
It turns out that the inverter in the above post must be implicit somewhere in the design. The inverter does not need to be placed in the design. We have _ena signal going straight to the T input of IOBUF

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jg_bds
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Registered: ‎02-01-2013

 

In a situation like this, when you're not sure what to do, you should ask yourself one question: WWXD? (What would Xilinx do?)

That's easy to figure out.

First, select the troublesome interface pin on the MPSoC IP in your block diagram, and then hit <CTRL+T> to elevate the interface to a top-level interface port.

2019-10-25_13-35-33.jpg

Then synthesize the design and open its schematic.

2019-10-25_15-00-51.jpg

Be sure to open all of the hierarchy levels between the two points of interest (the PSU and the IO cell, in this case).

2019-10-25_14-53-20.jpg

As you can see, Vivado is inserting a LUT to do an inversion between the high-active ENA pin in the PSU interface, and the high-active TRI pin of the IO cell.

-Joe G.

 

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1,143 Views
Registered: ‎05-16-2013
It turns out that the inverter in the above post must be implicit somewhere in the design. The inverter does not need to be placed in the design. We have _ena signal going straight to the T input of IOBUF

View solution in original post

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joe306
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Registered: ‎12-07-2018

Hello, I'm trying to do some similar and maybe you can help me. Here is what I have:

SD.jpg

I'm not sure how to wire up the SD Clk. I am new to this and from what I've found I need to use an IOBUF on the Bidirectional signals. I got the CMD and the DATA but the CLK I don't know what to connect the T port to? Should it be connected to the same T port as the CMD?

 

Thank you,

Joe

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jg_bds
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Registered: ‎02-01-2013

 

SD through EMIO supports only the lowest speeds, so the clock is always driven by the PSU--it's never the inbound "receive" clock used by faster protocols.

Absent a tri-state control output pin from the PSU (~.T), I would simply ground the tri-state control input pin of your IO buffer. The clock will always be driven out, and the feedback clock will always be returned.

-Joe G.

 

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joe306
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Registered: ‎12-07-2018

Hello, thank you for responding to my post. How about this:

 

block.jpg

On another post it was suggested to tie the tri-state control input pin high. Am I wrong? What do you suggest?

Thank you

 

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jg_bds
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Registered: ‎02-01-2013

 

You should ground the .T pin:

IOBUF_US.png

Also, you needn't create RTL to do this. Vivado has a "Constant" IP that can be used to connect inputs to constant logic high (1) or low (0).

7-28-2020 3-21-20 PM.png

-Joe G.

 

joe306
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Registered: ‎12-07-2018

Yep! Thank you very much. I was just looking at the UG571 page 54 but your reference is must more detailed. Thank you very much. Do you know if there are any examples of the PS side that I can try read/writing to an SD card?

Joe

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jg_bds
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Registered: ‎02-01-2013

 

Sorry; I'm just a HW guy. Accessing SD is almost as miserable an experience as accessing USB: you really need layers of SW to get anything done, and I'm not familiar with the specific processes and functions. (I rely on U-Boot and Linux commands to do anything with such interfaces.)

-Joe G.

 

joe306
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Registered: ‎12-07-2018

Thanks Joe. I'm a HW guy too and have not used Linux. I wonder if I could get things working with FreeRTOS?

 

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