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shyam457
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Registered: ‎01-26-2015

Send signal from custom IP to PS

Hi, 
I am using the zynq zc702 board with VIVADO and Xilinx SDK.
In my work I intend to do the following:
Write data onto a BRAM memory location from the PS section ( arm processor)
Then using software interrupt, enter the ARM into a wait state ISR routine till a done signal is returned from a custom IP, which processes the data written to BRAM (i.e DONE=1)
Then exit the ISR, RESET the DONE signal to 0 by PS  and the ARM should write the next data to the same BRAM memory location,  and again follow the same procedure.

So my question is, how do I assert a DONE=1 from my CUSTOM IP and pass it onto ( or make it read by) the ARM processor, so that when it is 1 it exits ISR.??? And also DONE has to written to 0 by the ARM

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muzaffer
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Registered: ‎03-31-2012

This is quite easy: implement an axi slave which hosts your IP in addition to some registers, done bit being part of one of the registers. Then you can export and connect the done bit do a PS interrupt line in your block diagram. Finally your IP can turn on the done bit when it is done which will trigger an interrupt for the ARM which in turn clear the done bit by executing a write to the axi-slave.
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vanmierlo
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Registered: ‎06-10-2008

You can also send the done bit to an EMIO GPIO. Are you using linux or a bare metal application?

shyam457
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Registered: ‎01-26-2015

Thank you all for replying.

I am using baremetal application

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shyam457
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Thanks muzaffer for replying.
Could you tell me what you meant by "export and connect done bit to PS interrupt line"?? I am still fairly new to the using interrupts part.
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muzaffer
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Registered: ‎03-31-2012

by "export & connect done bit to PS interrupt line" I mean that you bring the done register bit to a top level port in your IP (and potentially when packaging it, mark that signal as interrupt in IP packager). Then when you instantiate your IP in Vivado BD editor, you can connect it to the PS interrupt input. To do this, you need to configure the PS module to enable interrupts (PS config, interrupts, fabric interrupts PL-PS interrupts) which will add an interrupt port to PS module. In the BD editor just connect your interrupt to this port on the PS.
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shyam457
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Actually, after writing a data to BRAM, the ARM is already entering into a software interrupt ISR, where I want it to wait till a DONE=1 is obtained from my custom IP. Then the ARM exits the ISR makes DONE=0 and writes the next data to bram. So,do I actually need to use the interrupt to make DONE=1???
Could you tell me if I am right with the following idea:
If I were to use M_AXIGPIO of PS, connect it via AXI interconnect to an AXI GPIO (S_AXI) and connect the 1 bit gpio of the AXI GPIO to a DONE port present in my custom IP directly.
Would that suffice??
Would I be then able to read the DONE port present on my custom IP from the PS via M_AXI_GPIO and also write 0 to it by PS??
At the same time writing DONE=1 from the PL??
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vanmierlo
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Registered: ‎06-10-2008

It is very customary I believe to use two handshake signals, one in each direction. If you click the GPIO port open you can directly access the input and output bits (and ignore the tristate drivers).

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shyam457
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Registered: ‎01-26-2015

Hi muzaffer, thanks again for replying.
I had a doubt. Could you please tell me how to bring out a port when I use it as AXI slave. How do I bring DONE to top level port??
In the instantiate file, I created a port OUTDONE along with the axi slave ports and mapped DONE to OUTDONE. Is that right?? Are there any changes I have to make in the arch_imp file??
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muzaffer
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Registered: ‎03-31-2012

in addition to axi-slave ports you can have any other ports you want. Assuming you have verilog:

module axi_ip( ... axi ports,
output done_out);

reg done;
assign done_out = done;

I am not sure what arch_imp file is I am afraid but the done port is only necessary for vivado block diagram. For SDK interface, you need to export hardware and create a bsp.
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shyam457
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Thanks. I will just try it out. Thanks again
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shyam457
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hey, so i brought the DONE port out. But instead of interrupt, I mapped it onto 1 bit of a salve_register0. In this way, would I be able to write and read DONE from both ARM (PS) and Custom IP (PL)??
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muzaffer
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Registered: ‎03-31-2012

Yes, you can do this. And more: you can assign interrupt pin to the same slave_register0 bit which triggers the interrupt when PL writes to it, PS wakes up and clears it to get rid of the interrupt.
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shyam457
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Hi, so i worked with the idea.
My custom IP has 2 outputs, which I mapped to 2 slave registers slv_reg1 and slv_reg2. I mapped a DONE signal which is an output port from my custom IP to slv_reg0 and mapped a DONE2 signal to slv_reg. DONE2 is an input to my custom IP, to indicate that my PS has written data to BRAM. I avoided the use of interrupts from PL to PS.
I am writing to BRAM portA from PS, and have connected the dout of BRAM PORTA to din of my custom IP. But for some reason, I dont know why, as soon as I write to BRAM PORTA my custom IP outputs x and y seem to acquire this value. i.e. if I write 01010101 to my BRAM, it comes at dout of PORTA and to din of my custom IP. But the outputs x and y show 01010101 immediately. Why is that?? Is there something wrong with my use of the slave registers??
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