08-14-2016 10:27 AM
I am using the zynq zc702 board with VIVADO and Xilinx SDK.
In my work I intend to do the following:
Write data onto a BRAM memory location from the PS section ( arm processor)
Then using software interrupt, enter the ARM into a wait state ISR routine till a done signal is returned from a custom IP, which processes the data written to BRAM (i.e DONE=1)
Then exit the ISR, RESET the DONE signal to 0 by PS and the ARM should write the next data to the same BRAM memory location, and again follow the same procedure.
So my question is, how do I assert a DONE=1 from my CUSTOM IP and pass it onto ( or make it read by) the ARM processor, so that when it is 1 it exits ISR.??? And also DONE has to written to 0 by the ARM
08-14-2016 10:54 AM
08-14-2016 08:26 PM
08-14-2016 08:35 PM
08-15-2016 03:58 AM
08-15-2016 09:06 AM
It is very customary I believe to use two handshake signals, one in each direction. If you click the GPIO port open you can directly access the input and output bits (and ignore the tristate drivers).
08-15-2016 10:55 PM
08-15-2016 11:41 PM
08-17-2016 01:39 AM
08-18-2016 11:22 PM
08-24-2016 04:21 AM