I am designing an embedded system. The custom board has
Spartan6 xc6slx16 csg225 -2
DDR 1 Memory with 256Mb x8 running with 200MHz clock
The microblaze software runs on BRAM inside the FPGA not on the DDR.
I have an AXI Datamover IP configured as seen below.
My axi clock is 100MHz.
I also have a custom IP that controls the Datamover sending commands throught the command interface.
I want to measure the throughput of datamover. My custom IP keeps m_axis_mm2s_tready always at high and send a single mm2s transfer command at a time.
What I observe is that the m_axis_mm2s_tvalid signal of the datamover is NOT continuously high during a burst but rather toggles at each clock cycle during a burst as seen below.
The burst duration (when m_axis_mm2s_tvalid asserted) is measured to be 1.28usec = 128clk cycles @ 100MHz. Normally for a burst shoud take 64 cycles. But in my case it almost takes twice reducing the data throughput.
The datasheet specifies the throughput as ~390MBps but in this case the peak throughput is roughly 256Bytes / 1.28usec = 190MBps